PhD position · Grenoble INP - Institute of Engineering
Phd in estimation of the power consumption of multi-chiplet systems-on- chip incorporating processors using high-level simulation models / TIMA
- Type
- PhD position
- Organisation
- Grenoble INP - Institute of Engineering
- Posted
- 4 September 2026
About this listing
Current estimation methods, such as netlist-level simulations (a logic-gate-level representation of a circuit), are too slow for real-world applications and incompatible with the modularity of chiplets (limited access to complete netlists).
Last checked 3 October 2026. The official page opens for members.